This invention relates to the field of computer processor storage access, and more particularly, to reducing unnecessary accesses to the cache hierarchy.
A common performance problem found in modern microprocessors involves time spent accessing data storage. One approach to minimizing this problem is to reduce or eliminate any unnecessary accesses to storage. A common unnecessary access involves store operations which are just writing the same value back to the given memory location (silent store). There are some existing approaches to detecting and preventing store operations which are considered silent (not changing anything). These approaches involve some form of read prior to executing the store. The problems associated with this is that it either requires additional reads (just before storing) or requires a read of the cache data early and executing the store right away (before receiving additional store operations to the given memory location). There exists cases where initial read of old data must occur much earlier than the data associate with the given store. Also for these cases, there may be numerous actions to be taken on the given memory location before the given data to write is known.
Thus, what are needed are apparatus and methods for, providing a copy of a given memory location created from a read of the data cache at address generation time (initial issue), updating the copy with appropriate updates as the cache data is updated, and using this side copy to detect silent stores.